In computing, hardware acceleration generally involves using hardware circuits to perform functions more quickly and efficiently than executing software on general purpose processors. Examples of hardware acceleration include acceleration of bit block transfers in graphics processing units and regular expression for spam control in servers. Hardware devices that perform such acceleration are referred to as hardware accelerators when being separate from a central processing unit (“CPU”) in a computer. Example hardware accelerators include cryptographic accelerators, video processors, 3D graphics accelerators, artificial intelligence accelerators, regular expression accelerators, etc.
Hardware accelerators can be implemented as Application Specific Integrated Circuits (“ASICs”) that are customized during fabrication for desired uses or Field-Programmable Gate Arrays (“FPGAs”) that are configurable by a user after manufacturing. FPGA configuration can be specified using a hardware description language similar to that used for ASICs. FPGAs typically include an array of logic blocks and a hierarchy of reconfigurable interconnects that allow the logic blocks to be “wired together” like logic gates. As such, a user can configure logic blocks in FPGAs to perform complex combinational functions, or merely simple logic operations to synthesize equivalent functionality executable in hardware at much faster speeds than in software.